Eliminate Software Development Bottlenecks for SoCs

Meet competitive time-to-market requirements with virtual prototypes for early software development.

System-on-a-chip (SoC) devices, by definition, use a combination of integrated hardware and software to provide their specified functionality. Design and programming teams face many challenges and have huge tasks. Regardless of their performance, the entire system cannot be verified and validated until hardware and software are brought together in the upgrade lab. It is usually far too late in the project for hardware bugs to be detected, as chip towers cost a fortune and delay Time to Market (TTM). Finding software bugs at this point is inevitable, but it’s also too late to start software testing. Additionally, dozens or hundreds of on-board programmers all trying to debug their code on a handful of lab bench setups are a major bottleneck for the project.

To meet today’s competitive TTM requirements, as much software development as possible must be completed before the hardware becomes available. The setup lab should be the place for final validation only, finding and fixing a small number of software bugs related to interaction with hardware. FPGA emulation and prototyping are two possible solutions, and they play a vital role in many SoC projects. Embedded software can be effectively tested and debugged on these platforms long before the SoC is registered. However, there is still a bottleneck for access as most projects cannot afford to replicate platforms within the programming team. Additionally, the Registry Transfer Level (RTL) design needs to be almost complete to map into these platforms, so this cannot happen at the start of the project.

It may be possible to test and debug the software on processor models running in RTL simulators, which are easier to replicate. However, it works very slowly, creating performance bottlenecks, and also requires a fairly comprehensive design. What SoC projects really need is a simulation-based approach that doesn’t require RTL design. This allows hardware and software development to start and continue in parallel, coming together for co-verification and pre-silicon validation in FPGA emulation or prototyping. If software effort is the dominant factor in the planning, it can even start before the start of RTL coding, following the architectural phase of the project.

Virtual prototypes have emerged as the best solution to eliminate all these bottlenecks. A virtual prototype is an abstract software simulation model of the SoC hardware, containing fast instruction set (ISS) simulators for on-board processors. Virtual prototypes must model all architecturally visible registers and all other hardware functionality with which the embedded software directly interacts. They don’t need to include the many implementation details required in the RTL models used to create actual chips, so they can be developed earlier and more easily. Because virtual prototypes model the entire software hardware interface (HSI), they can run the same production software that will run in emulation, the FPGA prototypes, the staging lab, and the field.

Due to their abstract nature, virtual prototypes are fast, with an execution speed rivaling that of hardware platforms. Users can start operating systems and run applications (apps) in addition to low-level software that accesses the HSI. Complete software stacks can be tested and debugged. For even better performance, device virtualization can replace precise recording patterns when the HSI is not tested. Virtual prototypes run on standard hosts, typically personal computers (PCs), so the cost of deployment is low and there is no specialized hardware to build or maintain. They can be replicated quickly and inexpensively within distributed programming teams, helping parallel development and fostering collaboration.

Synopsys Virtualizer meets all the requirements for building and debugging a state-of-the-art virtual prototyping solution. Its fast simulation speed makes it possible to test and debug embedded software down to the application level. It supports device virtualization using VirtIO, the standardized open interface for simplified input / output devices. By replacing the detailed device drivers with the VirtIO models, the higher level software runs even faster in the virtual prototype. The industry’s richest set of standard models for several types of peripherals, including disk drives, human input devices such as keyboards and mice, and graphics processing units (GPUs) are included in Virtualizer.

Extensive virtual prototype model support for many widely used processors enables maximum productivity through fast and accurate simulation, advanced debugging and analysis, and synchronized integration with third-party software debuggers and development tools. integrated software. The creation of custom virtual prototypes is handled through an easy-to-use IDE allowing efficient block modeling, rapid assembly into a virtual prototype of the system, and automated packaging of the model for easy distribution.

Several unique features further enhance efficiency and usability, including:

  • Extended scripting support, support for tasks such as error and fault injection
  • Hybrid emulation and prototyping with Synopsys prototyping and emulation solutions
  • Platform state checkpoint and restore, very useful for skipping long initialization phases and directly jumping to times of interest for debugging purposes
  • A specialized built-in debugger for use with virtual prototypes
  • Connection to real world devices and interfaces such as PCI Express and Ethernet
  • Fast Track, which quickly detects configuration or usage bugs

Finally, continuous integration (CI) support allows all working copies of the software to be merged into a shared code base multiple times per day. Python Application Programming Interfaces (APIs) are available for all functionality to help develop CI scripts for software building and testing systems. CI reduces the effort required to merge and synchronize updates from multiple programmers, further increasing efficiency and reducing TTM. Virtual prototypes have proven to be the best way to remove the traditional bottlenecks associated with software development. For more information and more in-depth details, a recent white paper is available.

Sam tenent

(All posts)

Sam Tivez is a senior manager for R&D at Synopsys.

Gordon K. Morehouse